This invention relates generally to digital signal processing and more particularly to a sense amplifier flip-flop.
In the art of digital signal processing, flip-flops are frequently used. For example, a series of flip-flops are often connected together in a chain to form a shift register, which is a basic component used in a wide variety of applications. Typical flip-flops provide one of four types of data interfaces from input to output: static-to-static, static-to-dynamic, dynamic-to-static, or dynamic-to-dynamic. Thus, each flip-flop generally receives only static data input or dynamic data input and generates only static data output or dynamic data output.
Sense amplifiers are commonly used along with flip-flops in many different applications, such as random access memories (RAMs). The sense amplifiers are generally implemented as part of the memory design, while flip-flops are generally implemented as part of the logic design for a particular application.
In a typical RAM, the set-up time for a flip-flop can be a limiting factor in the speed of the RAM. This set-up time includes a delay within the flip-flop itself, as well as a delay introduced by the sense amplifier. A typical application using sense amplifiers in conjunction with flip-flops, such as a RAM, thus suffers from several disadvantages. These include the single type of data interface provided by the flip-flop and the speed-limiting set-up time.
In accordance with the present invention, a sense amplifier flip-flop is provided that substantially eliminates or reduces disadvantages and problems associated with previously developed flip-flops. In particular, a flip-flop is disclosed that provides universal interfacing and reduced set-up time.
In one embodiment of the present invention, a flip-flop is provided that includes an input circuit, a sense amplifier and an output circuit. The input circuit is operable to receive a data input signal and to generate complementary data signals. The sense amplifier is coupled to the input circuit. The sense amplifier is operable to receive the data signals from the input circuit and to generate complementary amplified signals based on the data signals. The output circuit is coupled to the sense amplifier. The output circuit is operable to receive the amplified signals from the sense amplifier and to generate complementary output signals based on the amplified signals.
Technical advantages of the present invention include providing an improved flip-flop. In particular, a single flip-flop is designed to provide both static and dynamic outputs. As a result, universal interfacing is provided by a single flip-flop. Accordingly, flip-flops of differing designs are not required for different types of interfacing.
Additional technical advantages of the present invention include providing a sense amplifier as part of the logic design within the flip-flop. As a result, the set-up time for the flip-flop is reduced. Accordingly, the performance speed of the flip-flop is increased. In addition, a random access memory incorporating the improved flip-flop is likewise improved.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, description, and claims.